The research 'Impact of Contact Gating on Scaling of Monolayer 2D Transistors Using a Symmetric Dual-Gate Structure' appeared ...

Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in real-world devices.

A universal passive logic element of positive and negative logic, made on just one transistor, is proposed. The logic element has at least two inputs, as well as three outputs: an OR, an XOR, and an ...