Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...
Electronic Design

Expanded DFT-Focused Test System Takes On More Applications

The V500 DFT-focused engineering test system includes new features and options for a wider range of applications. It includes optional support for delay (ac) scan to 30 MHz; I DDQ test methodologies; ...
Semiconductor Engineering

Enabling Test Strategies For 2.5D, 3D Stacked ICs

Improved testability, coupled with more tests at more insertion points, are emerging as key strategies for creating reliable, heterogeneous 2.5D and 3D designs with sufficient yield. “With chiplets, ...
Nasdaq

Advantest Unveils SiConic Test Engineering: Unified, Scalable Bench Environment for Debug and Validation

TOKYO, May 08, 2025 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today unveiled SiConic Test Engineering (TE), the newest addition to the SiConic ...