Researchers at the National Institute of Standards and Technology (NIST) have developed a new way to package photonic ...

Designed for nanometer-scale silicon ICs, a new wire-bond chip-packaging process–called Pad on I/O–by chip manufacturer LSI Logic (Milpitas, CA) places bond pads directly on active copper/low-K ...

TAIPEI (Taiwan News) — Demand for artificial intelligence chips is accelerating growth across the semiconductor industry, ...

Flip chip packaging represents a cutting‐edge assembly technique in which semiconductor devices are mounted upside‐down, enabling direct connection to the substrate via solder bumps. This method not ...

The chip manufacturing industry can be quite complex, and that’s normal. After all, there are multiple factors that go into the performance of a SoC, making it a success or directly ruining a good ...

NIST (The US National Institute of Science and Technology) scientists have developed a new process for packaging photonic integrated circuits so they can survive and operate in some of the most ...

Broadcom Inc. today detailed a new chip packaging technology, XDSiP, that makes it possible to create processors by stacking multiple silicon dies atop another. XDSiP is short for eXtreme Dimension ...

KLA KLAC is benefiting from strong advanced packaging growth as demand for more powerful chips continues to grow. The ...

The A20 chip widely expected to debut in the iPhone 18 Pro and folding iPhone will take advantage of a new packaging technique, on TSMC's 2nm chip fabrication technology. Rumors about the iPhone 18 ...

TL;DR: Apple has ordered next-gen M5 chips from TSMC for iPad Pro and Macs, with production in 2H 2025. The M5 chips will use TSMC's 3nm process and SoIC technology for better thermal management, with ...