EDN

Power dissipation in portables: Design considerations using low-power CMOS ICs

When a CMOS circuit is in an idle state there is still some static power dissipation–a result of leakage current through nominally off transistors. Both nMOS and pMOS transistors used in CMOS logic ...
Electronic Design

Dirt Cheap ASIC Design for Dummies (Part 3): NMOS, PMOS Silicon Design Using a Web Browser

Quickly learn what the difference is between PMOS and NMOS transistors in their structure and operation, and how CMOS works with the two in combination. Siliwiz, a free, browser-based, ASIC layout ...
Electronic Design

DDC Transistor Brings Low Power And High Performance To Portable Devices

SuVolta's PowerShrink transistor employs the Deeply Depleted Channel (DDC) structure. It boasts low power and high performance, using an improved planar bulk CMOS transistor that enables it to be ...
Hexus

AMD announces world's fastest Cmos Transistor

make use of 300-mm wafers. "Our ongoing research allows us to stay on the forefront of transistor design, which translates into increasingly powerful processors. Transistor technology is the 'engine' ...
ExtremeTech

Researchers create CMOS-compatible, 30nm programmable graphene transistor

Electronic engineers at Japan's GNC and AIST research centers have successfully created graphene transistors that are constructed and operated in a way that redefines 50 years of transistor ...
TechRepublic

Full Custom Design of Low Power 8-bit Magnitude Comparator with Small Transistor Count by Static CMOS

Comparator is the basic module in digital system. It is widely used in communication and calculation areas. This paper is to provide new low power, area solution for Very Large Scale Integration (VLSI ...